Presentation
Using Modern Assembler Coding Practices to Reduce CPU Usage
DescriptionBackward compatibility keeps decades-old Assembler running on our platform. However, evolving hardware can surface performance issues with older programming techniques. This session explores the CPU pipeline and cache, and their impact on Assembler code. We'll present a real customer case where Hardware Instrumentation Services (HIS) identified code hotspots. Using knowledge of the pipeline/cache and HIS data, we'll demonstrate how CPU consumption was significantly reduced.
Event Type
Technical Session
TimeWednesday, February 251:15pm - 2:15pm EST
LocationSalon 20
Performance and Capacity Management
Security and Compliance
Maximize System Performance & Throughput
Service Delivery
Best Practices Session
Intermediate